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Seminar 8. Logic function minimization
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Seminar 8. Logic function minimisation.pdf
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◄ Seminar 7. Switching algebra
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Cimputer Architecture
1. John L. Hennessy, David A. Patterson, Computer Architecture. A Quantitative Approach. – USA, Elsevier, Inc: 2012.
Mark Balch. Complete digital design: a comprehensive guide to digital electronics and computer system architecture, The McGraw-Hill Companies, Inc., 2003.
5. M. Morris Mano. Computer System Architecture. – International Edition, 1993.
Ata Elahi. Computer Systems: Digital Design, Fundamentals of Computer Architecture and Assembly Language. – SpringherIP, 2018.
John F. Wakerly. Digital Design. Principles & Practices. – Prentice Hall, 1999.
M. Morris Mano. Digital Logic and Computer Design. 2006
David Money Harris & Sarah L. Harris. Digital Design and Computer Architecture, 2013.
Fisa disciplinei
Software for laboratory works
Topic 1. Introduction
Topic 2 Number systems. Binary coded decimals
Topic 3 Data representation
Topic 4 Arithmetic operations
Topic 5. Switching algebra. Logic function minimisation
Topic 6. Combinational Logic Circuits
Topic 7. Sequential Logic Circuits
Topic 8 Microprocessor Architecture
Topic 9 I 8086 addressing modes
Topic 10 Arithmetic Instructions
Topic11 Control Unit Memory IO
Seminars 1.1. Number systems. Conversion
Seminar 1.2. Binary Coded decimal
Seminar 2.Fixed point binary numbers representation
Seminar 3. Floating point representation
Seminar 4. Addition and subtraction in DC IC CC
Seminar 5. Binary multiplication and division
Seminar 6. BSD arithmetic
Seminar 7. Switching algebra
Seminar 9. Combinational Logic Circuit synthesis
Seminar 10 Seven segment decoder
Seminar 11. Registers synthesis
Seminar 12.1 CPU Register Set
Seminar 12.2 Memory segmentation
Seminar 12.3 Data definition and memory distribution
Seminar 12.4 Arithmetic instructions
FAF-201 Variants to laboratory works
FAF-202 Variants to laboratory works
FAF-203 Variants to laboratory works
Combinational Logic Circuits synthesis, Report
Seven segment decoder report
Registers synthesis report
Laboratory work Data definition and memory distribution Report
Test Numbers conversion
Evaluation 1
Evaluation 2
Final exam
Course feedback
Seminar 9. Combinational Logic Circuit synthesis ►
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